1-th logic module:

• PXI format controller, dual-core processor Intel Core i5-2510E with a base frequency of at least 2.5 GHz and a frequency of at least 3.1 GHz single-core turbo mode, the amount of RAM 2 GB DDR3 (expandable up to 8 GB), with the frequency of 1333 MHz;
• data bus bandwidth PXI 132 MB / s;
• 7 chassis module I / O signals, industrial chassis format "Euromechanics" to accommodate the embedded controller and 7 IO modules in the PXI format signals;
• 8 slot PXI 3U height;
• PCI bus with a data rate up to 132 MB / s;
• module synchronization buses;
• 32 analog channels with common or 16 differential;
• multiplexed analog channels polling mode;
• 625 ADC sampling frequency in kHz signal measurement mode, from a single channel, and at least 500 kHz signal measurement mode, multiple channels;
• ADC resolution 18 bit;
• input signal range: ± 100 10 mV to ± V;
• 4 number of analog output channels;
• DAC sampling rate in MHz 2.8 lasing mode signals from one channel, 2 MHz lasing mode signals from the two channels, at least 1.54 MHz mode signal generation with three channels and at least 1.25 MHz mode signal generation with four channels;
• DAC resolution 16 bit;
• the output signal range: ± 1 10 V to ± V;
• 48 lines of digital I / O TTL (one 32 hardware clocked at up to 10 MHz);
• 2 counter / timer, with the characteristics MHz 80, 32 bit;
• software drivers DAQmx;
• ADC sampling frequency 1.8 MHz;
• input bandwidth 300 kHz;
• ADC resolution: up to 23 bits at a frequency of Hz polling 1 and 10 to bits at polling frequency 1.8 MHz;
• 20 function measurement signal parameters in the frequency and time domain;
• Check voltage - from ± 100 mV (with a resolution 100 nV) to ± 300 B (1 mV resolution);
• Current registration - from ± 20 mA (with a resolution 10 nA) to ± 1 A (1 mA resolution);
• Check the resistance - from 100 ohms (with a resolution 100 mO) to 100 mOhm (with 100 ohm resolution);
• capacitance measurement - from 300 pF (with a resolution 0.05 pF) to 10 mF (microfarads with 1 resolution);
• inductance measurement - from 10 uH (with a resolution 1 nH) to 5 TR (with a resolution 1 mH);
• frequency measurements from 1 Hz to 500 kHz;
• collecting signals of currents and voltages with a sampling frequency of up to 1.8 MHz;
• 2 channel output.

Channel 0 (service) - Programmable power supply:

• work in quadrants I and III in the current source mode or voltage;
• output voltage range from 0 to + 6 V;
• range of output currents of up to 0 1 A;
• DAC resolution 16 bit;
• ADC resolution in measuring feedback circuits 16 bit;
• uninsulated

Channel 1 - source-Meter:

• Work in I, II, III and IV quadrants in the modes of a current or voltage source;
• The range of output voltages ± 6 20 ± B and B;
• Output current range from ± 200 μA to ± 2 A (5 subbands);
• DAC resolution 18 bit;
• Resolution of the ADC in the measuring circuit feedback 18 bits;
• Isolated;
• Total 8 W output power (W 46 with external power supply);
• 3 kHz refresh rate;
• The possibility of parallel and serial connection of channels to generate large currents and voltages;
• DCPower software drivers;
• 2 input synchronous channel;
• ADC sampling frequency in real time 100 MHz / channel;
• ADC sampling frequency in strobe mode 2 GHz / channel;
• The input bandwidth 100 MHz;
• ADC resolution 14 bit;
• The input range of the analyzed signal is from ± 100 mV to ± 10 V;
• Input impedance 50 Ohm, 1 MOhm;
• Built-in Memory 256 MB / channel;
  
  Scope software drivers:
• 160 digital I / O channels;
• The level of the TTL logic signals;
• Hardware clock channels 40 MHz;
• The stability of the reference oscillator clock 100 ppm;
• I / O control: hardware and software based on FPGA;
• FPGA Xilinx Virtex II (3 million logic gates.);
• Support for the mode of data exchange via DMA channels;
• Built-in Memory 192 kB;
• The ability to implement proprietary data exchange protocols, specialized startup schemes, counters / timers, etc. on the basis of FPGA with a time resolution of 25 ns;
• RIO software drivers;
• 1 output channel;
• DAC sampling rate 200 MHz (400 MHz with hardware interpolation);
• DAC resolution 16 bit;
• Output generated signal range: ± mV to ± 2.82 6 in with a load on 50 ohms;
• Output Impedance: Ohm 50, 75 ohms;
• Modes of operation: arbitrary waveform generation, the generation of the standard types of signals sine, square, triangle, saw, noise;
• Band frequency outputs 80 MHz;
• Built-in memory per channel 256 MB;
• Digital LVDS connector for synchronous generation of digital signal representation;
• Size: no more than a 1 slot in a PXI chassis with a height of 3U;
• FGEN software drivers;
• The ability to synchronize via GPS, IEEE 1588-2008 (IEC 61588: 2009), or IRIG-B;
• Built-in high-stability TCXO 10 MHz (1 ppm);
• Integrated routing of internal and external clock and trigger signals;
• Support for the active GPS;
• Digital and analog triggers;
• The possibility of external clocking.

2th logical module:

• a PXI-format controller, a dual-core Intel Core i5-4400E CPU with a base frequency of 2.7 GHz and a frequency of at least 3.3 GHz in single-core turbo mode, 4 GB DDR3 (expandable to 8 GB), 1600 MHz;
• data bus bandwidth PXIe 1 GB / sec;
• 2 Gigabit Ethernet port, 2 port USB 3.0, 4 USB 2.0, 1 port ExpressCard;
• chassis on 7 signal input / output modules, industrial enclosure format "Euromechanics" to accommodate the embedded controller and 7 input / output modules in PXIe format;
• 4 PXI slot, 1 PXI slot for synchronization modules, 2 hybrid PXIe / PXI slots with 3U height;
• PXIe bus with data rate up to 3.132 GB / sec;
• module synchronization buses;
• the size of the hard disk 4 x 750 GB SATA II;
• support for RAID-0 modes and JBOD;
• write / read speed mode RAID-0 200 MB / s;
• 32 digital I / O channels;
• support levels of logic signals - In 1.2, 1.5 In, In 1.8, 2.5 in, 3.3 in, TTL, LVTTL;
• the ability to set different logical levels for input and output channels;
• Channel clocking - hardware with a frequency of 200 MHz;
• built-in memory 64 MB / channel;
• HSDIO software drivers;
• 2 number of input channels;
• sample rate of the ADC 100 MHz / channel;
• input bandwidth 100 MHz;
• ADC resolution 14 bit;
• analyzed input signal range: ± 100 10 mV to ± V;
• Ohm input impedance 50, 1 MW;
• Integrated chip downward digital signal transfer (DDC) in the band up to 40 MHz;
• MB built-in memory 256;
• Scope driver software;
• 1 number of output channels;
• DAC sample rate 100 MHz (400 MHz with hardware interpolation);
• DAC resolution 16 bit;
• the output range of the generated signal is from ± 2.82 mV to ± 6 V at a load of 50 Ohm;
• output impedance 50 ohm, 75 ohm;
• operating modes: Arbitrary Waveform Generation and intermediate frequency signals for RF applications, generate standard sine signal types, square, triangle, saw, noise;
• band frequency outputs 43 MHz;
• low-voltage multiplexer / matrix switch - 48x1 (1-wire), 24x1 (2-wire), 12x1 (4-wire), 2 12x1 group (2-wire), 4 group 6x1 (2-wire) and 4x6 (2-wire );
• switching voltage: 60 VDC, 30 V (cc) alternating current;
• maximum switched current: up to 1 A;
• the maximum current is passed: to 1 A;
• maximum switching power: up to 30 W;
• Bandwidth: 10 MHz;
• internal resistance (path resistance): 1 ohms;
• the frequency of channel switching: 200 Hz;
• compatibility with software drivers Switch.